A Synchronous Mode MPI Implementation on the Cell BETM Architecture

The Cell Broadband Engine is a new heterogeneous multi-core processor from IBM, Sony, and Toshiba. It contains eight co-processors, called SPEs, which operate directly on distinct 256 KB local stores, and also have access to a shared 512 MB to 2 GB main memory. The combined peak speed of the SPEs is 204.8 Gflop/s in single precision and 14.64 Gflop/s in double precision. There is, therefore, much interest in using the Cell for high performance computing applications. However, the unconventional architecture of the SPEs, in particular their local store, create some programming challenges. We describe our implementation of certain core features of MPI, which can help meet these challenges, by enabling a large class of MPI applications to be ported to the Cell. This implementation views each SPE as a node for an MPI process, with the local store abstracted in the library, and thus hidden from the application with respect to MPI calls. We further present experimental results on the Cell hardware, where it demonstrates good performance, such as throughput up to 6.01 GB/s and latency as low as 0.65 μs on the pingpong test. The significance of this work lies in (i) demonstrating that the Cell has good potential for running intra-Cell MPI applications, and (ii) enabling such applications to be ported to the Cell with minimal effort.